1. Field of the Invention
The present invention relates to a mesh generating method for generating triangular or tetrahedral meshes on a semiconductor device to be analyzed in device simulation techniques, and more particularly, to a mesh generator for generating meshes made up of triangular or tetrahedral elements.
2. Description of the Related Art
In fabricating semiconductor devices, simulation is commonly performed employing a device simulator which computes physical quantities within a semiconductor device by using a computer to calculate such electric characteristics of the semiconductor device as a terminal current and a threshold voltage. In making an optimization design so that a semiconductor device will exhibit optimal electric characteristics, use of a device simulator enables more drastic reduction of both costs and time required than by experimental fabrication of actual LSIs. In addition, by using the device simulator, which calculates physical quantities within a semiconductor device, it is possible to examine behavior of electrons and holes in a semiconductor. Such examination leads to an analysis of causes of impact ionization phenomenon, one of the problems of a miniaturized MOSFET.
In device simulation, in order to obtain physical quantities within a semiconductor device, change of isolation in the semiconductor is analyzed by solving partial differential equations such as the Poisson equation expressing a relationship between a potential and a carrier concentration and a current continuity equation. One solution of such partial differential equations is to divide a semiconductor device into small areas and discretize a partial differential equation. When in dividing a semiconductor device into small areas, it is a common practice to divide the device into small triangular areas (triangular elements) for a two-dimensional simulation analysis and into small terahedral areas (terahedral elements) for a three-dimensional simulation analysis in order to precisely represent a configuration and a structure of the semiconductor device.
In a simulation based on the finite difference method, the control volume method is used for the discretization of a fundamental equation to be solved. The control volume method will be described in the following with reference to two-dimensional triangular meshes generation through partitioning an analysis space into triangular elements.
Taking such a part of a triangular mesh as shown in FIG. 14 as an example, a polygon, indicated by a broken line in the figure, is referred to as a control volume, which is formed by a vertical bisector of each of mesh edges &lt;IH&gt;, &lt;IJ&gt;, &lt;IK&gt;, &lt;IL&gt;, &lt;IM&gt; and &lt;IN&gt; joining the mesh node (I) and mesh nodes (H, J, K, L, M, N), respectively. The vertical bisector line segment is referred to as a cross-section for the mesh edge. Polygonal vertexes O, P, Q, R, S and T of the control volume are circumcenters (the center of a circumcircle) of corresponding triangular elements of the mesh. In the control volume method, a flow of physical quantities along a mesh edge is represented by multiplying a density of the flow along the mesh edge by a length of a side (also referred to as a cross-section in two-dimensional meshes) of a control volume. For example, multiplication of a current density along the mesh edge &lt;IJ&gt; by a length of the cross-section &lt;OP&gt; will be a current along the mesh edge &lt;IJ&gt;.
Depending on a shape of a triangular mesh, however, there is such a case in which a control volume fails to form a polygon as shown in FIG. 15. In this case, a cross-section &lt;OP&gt; of the control volume takes a negative length, so that a flow of physical quantities on the mesh edge &lt;IJ&gt; will be in an opposite direction to a density of the flow. In such a case, the analytical error increases.
Generation of a cross-section with a negative length occurs when there exists, within a circumcircle of a triangular element in a triangular mesh, a mesh node of other triangular elements. Therefore, in order to create a triangular mesh without a cross-section with a length of negative value, Delaunay partitioning is employed. Delaunay partitioning is a triangulation that no mesh nodes of other triangular elements exists within a circumcircle of each triangular element.
In device simulation techniques, the larger the number of divisions of a mesh is which is generated on a semiconductor device to be analyzed, the higher precision a simulation analysis obtains. However, the number of mesh nodes and mesh edges increases with the number of divisions of a mesh. As a result, the volume of numerical calculations and time for the calculations increase drastically. In practice, an upper limit is placed upon the number of divisions of a mesh to be generated on a semiconductor device, that is, the number of small areas to be formed in a mesh. In analyzing a MOS transistor, improvement of analysis precision is achieved, without increasing the number of divisions of the mesh, by generating, for example, fine meshes in the vicinity of a junction portion between a source and a drain and coarse meshes in a substrate region to vary a density of meshes according to the structure of a semiconductor device to be analyzed. One of such techniques is recited in Patent Laying-Open No. 3-101150. The article recites a technique for interactively generating two-dimensional meshes with reference to an impurity density of a semiconductor device.
One of the methods for making finer meshes out of initial meshes created based on the Delaunay partitioning by adding mesh nodes while maintaining the Delaunay partitioning is the recursive method recited in M. S. Mock, "Proc. of the NASECODE IV", pp. 36-47, 1985.
With reference to a flow chart shown in FIG. 16, mesh node addition processing according to the recursive method will be described taking a triangular mesh shown in FIG. 17 as an example.
First, an additional mesh node 210 is provided on the triangular mesh, and triangular elements containing the additional mesh node 210 within its circumcircle are found as illustrated in FIG. 18 (Step 1601). Then, the found triangular element is deleted from the mesh as shown in FIG. 19 (Step 1602). Then, each vertex of a polygon, which is generated as a result of the deletion of the triangular element, is joined to the additional mesh node 210 to create a triangular mesh made up of triangular elements as illustrated in FIG. 20. Thus obtained new triangular elements satisfy the conditions of the Delaunay partitioning.
Another method for making meshes finer by adding mesh nodes while maintaining the Delaunay partitioning is the Octree method recited in "Automatic Rectangle-based Adaptive mesh Generation Without Obtuse Angle" (S. Muller, K. Kells, W. Fichtner, "Federal institute of Technology at Zurich (ETH)" Integrated Systems Laboratory Technical Report No. 91/2". This method is to make meshes finer by using not triangular meshes generated based on the Delaunay partitioning but rectangular meshes as initial meshes. A mesh satisfying the conditions of the Delaunay partitioning can be obtained by partitioning each small rectangular area (rectangular element) in the rectangular mesh by a diagonal line. Taking the division shown in FIG. 21 as an example, a circumcircle of each of triangular elements IJK and ILJ generated by dividing the rectangular element ILJK coincides with that of the original rectangular element and contains no mesh node of other elements, which fulfill the conditions of the Delaunay partitioning.
For generating a mesh comprised of three-dimensional small areas satisfying the conditions of the Delaunay partitioning on a semiconductor device to be analyzed and re-establishing the mesh while maintaining the Delaunay partitioning, there is a technique recited in Japanese Patent Laying-Open No. 4-309183. The article discloses a method of generating three-dimensional terahedral meshes by joining vertexes of an objective solid (three-dimensional device structure etc.) to generate an initial mesh made up of three-dimensional terahedral elements satisfying the conditions of the Delaunay partitioning, and dividing terahedral elements bridging structural boundaries of the objective solid to prevent every terahedral element from bridging the structural boundaries of the objective solid. The process of such division processing leads to refinement of three-dimensional terahedral meshes.
Regarding two-dimensional meshes, the above-described conventional mesh generation methods enable meshes to be made finer by adding new mesh nodes while ensuring the Delaunay partitioning for triangular elements. It is therefore possible to execute a numerical analysis with high precision for simulation analyses. According to these methods, however, it is impossible to delete mesh nodes to make meshes coarser. As a result, the amount of memory of a computer necessary for the execution of numerical calculations and computation time for processing greatly increase by the degree of the refinement of a mesh obtained by increasing the number of divisions of a mesh.
In addition, it is necessary to decide an upper limit of number of generated mesh elements in order to avoid an increase in memory consumption and computation time. In the above case, it is necessary to generate coarse meshes having the small number of mesh nodes on a semiconductor device to be analyzed beforehand and add mesh nodes such that the number of mesh nodes or divisions of a mesh will not exceed the upper limit. Such a process is, however, troublesome and time-consuming.
As well as the above case of two-dimensional meshes described in Patent Laying-Open No. 3-101150, according to the above-described mesh generation method for three-dimensional meshes, it is possible to make meshes finer by increasing the number of mesh nodes, but not possible to make them coarser by decreasing the number of mesh nodes. In addition, there is a case where the Delaunay partitioning is not ensured for terahedral elements newly generated by adding mesh nodes. In such a case, analysis precision might not be improved even if the number of mesh nodes is increased.